Greenfield DRAM online dates: the Phase-3 clock is a staircase, and its first real step is H2 2027

The question

Verbatim: "Track greenfield DRAM bit-supply ONLINE dates (Korea $575B fabs, Micron ID1, Samsung P4L/P5) separately from announcement dates, since the announcement (#3) already fired and the online date is the real Phase-3 clock."

Context: this is metric #3 of the tripwire set in [[2026-07-07-dram-hbm-phase2-phase3-early-signals]]. That brief ruled "announcement ≠ online" and said the online date is the lead indicator into ASP rollover (#4). This brief builds the per-fab online-date register it asked for.

What we already know (from the vault)

• #3 is defined as a greenfield trigger, not a capex trigger. It fires when "2+ vendors bring greenfield wafer capacity online (not node/packaging)", or when Samsung hits ~250k HBM wafers/month ahead of schedule. The ~$575B Korea announcement (four fabs ~$520B + ~$53B packaging, Jul 2026) raised the Phase-3 prior but not the clock, because bit supply was dated 2029-2030 ([[2026-07-07-dram-hbm-phase2-phase3-early-signals]]).
• The prior window for relief is H2 2027-2028. M15X, ID1 and P4L/P5 "will not add meaningful DRAM capacity until mid-2027 to 2028" ([[2026-06-28-chip-memory-cycle-phase2-phase3-indicators]], [[2026-07-21-memory-maker-fab-financing-supply-side]]).
• Micron's capex is going into buildings first. CIP nearly doubled to $10,935M while equipment-not-placed-into-service rose only 3.7%, which points to an 18-30 month tool lag. Tongluo (Taiwan, $1.8B PP&E, Mar 2026) is the largest FY2026 capex item. ID1 first wafer was described as pulled in to mid-CY2027 and ID2 as operational 2028 ([[2026-09-06-vendor-capex-composition-memory-anchor]]).
• HBM-side online milestones are mostly done or dated. HBM4 mass production began Feb 2026 at Hynix M16/M15X and Samsung Pyeongtaek. Micron Hiroshima (HBM) broke ground May 2026, with first shipments in 2028 ([[2026-05-18-hbm3e-hbm4-capacity-timeline-phase-b-end]]).
• The 2018 lag is a floor. The measured announce→rollover lag is DRAM 12-16 months, but the 2017 money went into an already-standing shell. The current cycle is shell-first, so the center estimate moves to about Q4 2027 - Q1 2028 ([[2026-09-09-2018-capacity-announce-asp-rollover-lag]]). A newsletter noted Samsung "pulled its Yongin fab timeline forward to 2029" ([[2026-07-14-innermost-loop-singularity-trade-chip-cycle]]).

What the web says

• Micron ID1 / ID2 / New York. On the FQ3 FY2026 call (Jun 24 2026), management reaffirmed ID1 first wafer output in mid-CY2027, with customer qualifications to follow. ID2 is timed for late CY2028 and was moved ahead of the first New York fab, and Clay (NY) production is not expected until about 2030. A year earlier (Jul 2025) the ID1 wording was "first DRAM wafer output in the second half of calendar 2027." Management also pushed "tight supply" out to beyond calendar 2027. These come from search-result summaries of the prepared remarks plus Tom's Hardware and Finsee FQ3-26 review. The primary PDF 301-redirected (see Sources).
• SK hynix M15X (Cheongju) is the one new fab already producing. It launched around May 2026 (Seoul Economic Daily, Dec 2025). Sources give different ramps: ~40k wafers/month in H2 2026 rising to ~80k in 2027 (search summary of The Elec/TechTimes), versus "up to 70,000 wafers/month in 2026 (from 10,000 in 2025)" (Korea JoongAng Daily, Mar 12 2026). Its output is 1b/1c DRAM aimed at HBM and server (SK hynix Newsroom).
• SK hynix Yongin Y1 is the first true greenfield wafer fab in the set. Construction completes Feb 2027, "earlier than planned", and equipment goes in during Q2 2027. The fab has six cleanroom phases (JoongAng Daily). Other reports give the first cleanroom opening as Feb or Mar 2027, about 2-3 months ahead of plan (Cleanroom Technology). The ramp is also reported two ways: 60k wafers/month per cleanroom every 6 months to 360k by H1 2030 (TechTimes, Jun 2026), or the first three phases (~150k) running within the same year (JoongAng). Y2 construction starts Q3 2028. The P&T7 packaging plant (₩19T) is built Apr-end 2027. It is HBM back-end, not wafer bits.
• Samsung P4 is a brownfield conversion that is already live. Pyeongtaek Ph4 (and Ph2) lines were converted from foundry to 1c DRAM, with P4 at about 80k wafers/month. Samsung targets more than 200k wafers/month of 1c by YE2026, mostly for HBM4 (Digitimes, Nov 2025; Digitimes, Dec 2025; both paywalled beyond headline and summary).
• Samsung P5 is greenfield with the latest date of the named set. Construction resumed in 2026 about 6 months ahead of the restart plan. It completes H1 2027, with equipment shortly after and mass production in late 2028. It is a multi-product fab (HBM, DRAM, NAND, possibly foundry). P6 construction starts Q3 2028 (JoongAng Daily; MemoryMarket).
• Industry consensus on the physical bottleneck. "New fabrication capacity in Korea is unlikely to come online until the second half of 2027." Near-term spend "funds infrastructure and advanced packaging rather than immediate wafer production equipment." Once the H1-2027 shells finish, each Korean maker has cleanroom room for about +150k wafers/month (JoongAng Daily).

Per-fab online-date register (as of 2026-09-15)

"(bg)" = announcement date is from Ray background knowledge and was not re-verified this run. Samsung Taylor is excluded because it is a foundry fab, not DRAM.

Convergences and contradictions

• Convergence on the date. Vault and web agree that no greenfield DRAM wafer comes out before H2 2027. Two independent vendor timelines (SK hynix Y1 and Micron ID1) both land their first greenfield output in the same half-year, H2 2027. That is the earliest date #3's "2+ vendors" condition can literally be met. It also sits inside the Q4 2027 - Q1 2028 center from [[2026-09-09-2018-capacity-announce-asp-rollover-lag]]. That makes two weak estimators agreeing, not independent confirmation.
• Contradiction the vault needs to fix. The parent brief treated the $575B announcement as "bit supply 2029-2030". That holds for its incremental tranche (Samsung Yongin 2029, SK Y2 and P6 at 2030+). But Y1, whose phases start in 2027, is part of the same Yongin cluster, and it is unclear whether the $575B figure includes it. The Korean clock therefore starts in 2027, not 2029. The mapping of the four $575B fabs to named fabs was not verified.
• Source conflicts on ramp slope. For M15X, 2026 capacity is 40k vs 70k. For Y1, the ramp is 60k per 6 months vs 150k in the first year. These slopes matter more for bit-supply sizing than the start dates do, and the sources disagree by about 2x.

Synthesis for RDCO

The Phase-3 clock is a three-step staircase, and only the middle step is the trigger. Step A (2026, already live) is brownfield conversion: Samsung P4's 1c lines and SK hynix M15X plus the M14/M16 1c conversions. This capacity is online now, but it is not greenfield by #3's definition, and it goes mostly to HBM. HBM uses far more wafer area per bit than DDR5, so commodity-bit relief from Step A is small. That is why prices kept rising through it. Step B (H2 2027 - 2028) is the real clock. SK Y1 cleanroom opens Feb-Mar 2027, tools go in Q2 2027 and first-phase output comes in H2 2027. Micron ID1 first wafer is mid / H2 CY2027, with customer qualification pushing meaningful bits into 2028. Samsung P5, Micron ID2 and Hiroshima HBM all land in 2028. Step C (2029-2030+) is the bulk of the $575B: Samsung Yongin (2029), SK Y2, P6 and Micron NY. Step C matters for how deep the down-leg goes, not for when the turn comes.

Operational rule for the Markov Layer-1 tracker. Re-specify #3 from "greenfield online" to a dated, observable ladder: (a) tool move-in at a greenfield shell, (b) first wafer out, (c) customer qualification complete / volume shipments. Flip #3 to TRIGGERED at (b) for 2 of 3 makers. With today's guidance, that means SK Y1 plus Micron ID1, no earlier than Q3-Q4 2027. Treat (a) at two makers (earliest Q2 2027) as the pre-trigger that raises the prior. First wafer out is not the same as bit supply: DRAM cycle time plus one to two quarters of qualification means material greenfield bits reach the market around Q1-Q2 2028. That is where #3 hands off to #4 (ASP rollover). The tool move-in step also connects to the Micron balance-sheet gauge in [[2026-09-06-vendor-capex-composition-memory-anchor]]. When "equipment not placed into service" starts climbing, Micron's shells are being tooled. That is a quarterly 10-Q observable that leads ID1 first-wafer by about 2-3 quarters.

Revision direction is itself a signal. Since announcement, almost every date has been pulled in: Y1 by 2-3 months, P5 by ~6 months vs restart, Samsung Yongin to 2029, M15X HBM4 by ~4 months, and ID1 wording tightened. The one exception is Micron NY, which slipped to about 2030, and that is Micron choosing brownfield-adjacent Idaho speed over a new site, not discipline. Uniform pull-ins are the late-Phase-2 "defensive land-grab" shape. The tracker should log every pull-in as prior-raising. It should treat the first announced slip of a greenfield tool move-in (especially Y1 phase 2+ or P5 equipment) as the earliest P4-precursor discipline signal. Samsung has already shown it will pause P5 ([[2026-07-21-memory-maker-fab-financing-supply-side]]).

Position posture: unchanged. Nothing in this register can fire #3 before Q2 2027 (pre-trigger) or Q3-Q4 2027 (trigger). This matches the capital-cycle horizon: the thesis stays in Phase 2 through at least mid-2027 on the supply side, and the near-term Phase-3 risk still comes from demand and inventory (#1, #2), not new fabs. Upcoming checkpoints for the register: Micron FQ4 FY2026 call (late Sep 2026, exact date not confirmed this run), SK hynix and Samsung Q3 calls (late Oct 2026), then the Y1 cleanroom opening (Feb-Mar 2027), which is the first hard physical milestone on the greenfield clock.

Why this is in the vault

This is the dated input for tripwire #3 in the Markov chip-fab / memory-cycle Layer-1 phase tracker (memory-cycle-v1.1). It turns "track the online date" into a named-fab register with a trigger rule (2 of 3 makers at first-wafer-out, earliest Q3-Q4 2027) that the tracker can check against each earnings call.

Open follow-ups

• What share of Y1 and P5 first-phase wafers goes to HBM vs commodity DRAM, and what is the HBM4/4E-to-DDR5 wafer-per-bit trade ratio? Without these, wafer starts cannot be converted into commodity bit supply.
• What is Micron Tongluo's first-DRAM-output date and capacity? It is the largest FY2026 capex item but is missing from all online-date guidance found.
• Which named fabs make up the Korea ~$575B / four-fab commitment, and how much is new vs re-announced Yongin cluster spend?
• Which is the right Y1 ramp slope (60k per 6 months vs ~150k in year one)? This sets how steep the 2028 bit-supply step is.
• Did Micron's FQ4 FY2026 call (late Sep 2026) change the ID1/ID2 dates? Re-check the register after it.

Related

• [[2026-07-07-dram-hbm-phase2-phase3-early-signals]] (parent; tripwire #3 definition)
• [[2026-06-28-chip-memory-cycle-phase2-phase3-indicators]]
• [[2026-09-06-vendor-capex-composition-memory-anchor]] (Micron CIP / equipment-not-in-service gauge = tool move-in leading observable)
• [[2026-07-21-memory-maker-fab-financing-supply-side]] (Samsung P5 pause/resume)
• [[2026-05-18-hbm3e-hbm4-capacity-timeline-phase-b-end]] (HBM-side online milestones, Hiroshima)
• [[2026-09-09-2018-capacity-announce-asp-rollover-lag]] (lag floor; Q4 2027 - Q1 2028 center)
• [[2026-07-14-innermost-loop-singularity-trade-chip-cycle]] (Samsung Yongin pulled to 2029)
• [[2026-07-03-cxmt-dram-capacity-memory-oligopoly-risk]]
• [[2026-05-27-markov-equities-pipeline-spec]]

Sources

Vault

• 06-reference/research/2026-07-07-dram-hbm-phase2-phase3-early-signals.md
• 06-reference/research/2026-06-28-chip-memory-cycle-phase2-phase3-indicators.md
• 06-reference/research/2026-09-06-vendor-capex-composition-memory-anchor.md
• 06-reference/research/2026-07-21-memory-maker-fab-financing-supply-side.md
• 06-reference/research/2026-05-18-hbm3e-hbm4-capacity-timeline-phase-b-end.md
• 06-reference/research/2026-09-09-2018-capacity-announce-asp-rollover-lag.md
• 06-reference/2026-07-14-innermost-loop-singularity-trade-chip-cycle.md

Web (fetched)

• Korea JoongAng Daily, "Samsung and SK are expanding fast, but why is memory still in short supply?" (Mar 12 2026): https://www.koreajoongangdaily.com/business/samsung-and-sk-are-expanding-fast-but-why-is-memory-still-in-short-supply/12526698

Web (search-result summaries only; not fetched)

• Micron FQ3 FY2026 prepared remarks (primary): https://investors.micron.com/static-files/631b1a32-5537-46ae-8f40-82e42fc79dfe (301-redirects to IR overview; not retrieved)
• Finsee, Micron Q3 2026 earnings review: https://finsee.ai/earnings/mu/2026/q3/en/
• Tom's Hardware, Micron US fab projects (ID1 2H 2027, NY later): https://www.tomshardware.com/pc-components/dram/micron-details-new-u-s-fab-projects-idaho-fab-1-comes-online-in-2h-2027-new-york-fabs-come-later-hbm-assembly-in-the-u-s
• SK hynix Newsroom, M15X DRAM: https://news.skhynix.com/en/sk-hynix-to-produce-dram-from-m15x-in-cheongju/
• Seoul Economic Daily, M15X launch May 2026: https://en.sedaily.com/finance/2025/12/25/sk-hynix-to-launch-m15x-fab-in-may-2026-cementing-global-ai
• Cleanroom Technology, Yongin cleanroom opens early: https://cleanroomtechnology.com/sk-hynix-to-open-cleanroom-at-yongin-fab
• TechTimes, SK hynix DRAM roadmap / Yongin 360k (Jun 2026): https://www.techtimes.com/articles/317859/20260606/sk-hynix-dram-capacity-roadmap-revealed-yongin-alone-adds-360k-wafers-monthly.htm
• Digitimes, Samsung P4 shifts to 1c DRAM (paywalled beyond summary): https://www.digitimes.com/news/a20251111PD232/samsung-dram-production-investment-nvidia.html
• Digitimes, Samsung accelerates Pyeongtaek expansion (paywalled beyond summary): https://www.digitimes.com/news/a20251212PD218/samsung-dram-hbm4-production-expansion.html
• MemoryMarket, Samsung P5 update: https://www.memorymarket.com/a/14857

Blocked (flagged, not retried)

• UPI, SK hynix Korea output expansion (Aug 9 2026): https://www.upi.com/Top_News/World-News/2026/08/09/sk-hynix-investment-ai-memory/4361786319274/ (HTTP 403)