06-reference/research

hbm3e hbm4 capacity timeline phase b end

2026-05-18·research-brief·source: deep-research
memory-cyclehbmhbm3ehbm4hbm4esk-hynixsamsungmicronm16phase-markersinvestingcapacity-onlinenvidia-rubin

HBM3E / HBM4 capacity-online timeline through 2026-2027 — and the milestones that end Phase B

The question

What's the precise expected capacity-online timeline for SK Hynix HBM3E/HBM4 (M16 fab), Samsung HBM, and Micron HBM through 2026-2027 — and which production milestones would mark the end of Phase B (cycle-peak) for the memory trade?

Top-scored item in the 2026-05-18 backlog sweep (14/15: fit 5, spec 5, signal 4). Directly load-bearing for the active memory-cycle thesis paper trades (MU + SMH deployed, SNDK + INTC added via smart-money-mirror v1).

What we already know (from the vault)

What the web says

Convergences and contradictions

Strong convergence (vault ↔ web):

Contradiction / new information:

Synthesis for RDCO

When does Phase B (cycle-peak) end?

Working framework: 4 phases — (1) demand surge, (2) capacity announcement, (3) capacity online, (4) down cycle. The vault thesis maps these to its own 3-state phase-marker scheme (Tightness / Plateau / Rollover). Phase B in the founder's framework = "cycle-peak" = the window where (2) is mostly priced in and (3) is starting to be visible in shipped wafers. Phase B ends when (3) — capacity online — passes the demand-growth rate.

Best-evidence Phase B end window: Q3 2026 - Q2 2027.

Three converging signals point to this window:

  1. Samsung's +80,000 wafer/month of new 1c capacity comes online progressively across 2026; by Q3-Q4 2026 a meaningful slug is shipping. Samsung-led capacity ramps historically inflect pricing within 6 months of online (2018 cycle precedent).
  2. HBM4 ramps at all three makers concurrent in Q1-Q2 2026 — first year of HBM4 is supply-constrained (Phase B-confirming); second year (2027) is when yields normalize and effective capacity steps up sharply.
  3. NVIDIA Rubin launches H2 2026 with HBM4 — the demand pull peaks here. Whatever incremental demand Rubin adds is then matched against the Samsung-led capacity expansion landing in late 2026 / early 2027.

The cleanest single milestone that would mark Phase B end: any one of the three makers reports HBM ASP -10% QoQ AND DRAM spot -15% over 90 days in the same earnings cycle, OR Samsung reports its 250k wafer/month target was hit early. Hitting the wafer target early = supply landed faster than the demand curve absorbed it = textbook cycle top.

Concrete production milestones to watch (in priority order)

Milestone Vendor Date Phase B end signal?
HBM4 mass production starts Hynix M16 / Samsung Pyeongtaek Feb 2026 (actual) No — confirms Phase B in progress
Samsung HBM4 NVIDIA qualification Samsung Mid-late Q1 2026 No — confirms three-supplier reality (mild bear pressure)
HBM4 Hynix Q3 2026 ramp (delayed from Q2) SK Hynix Q3 2026 Yes if it slips further OR if Q2 2026 earnings show Hynix HBM ASP -10% QoQ
Samsung 250k wafer/month target hit Samsung End-2026 target Yes — primary cycle-top trigger if hit early or fully on time
HBM4E sampling All three H2 2026 No — confirms HBM4 supply is normalizing
NVIDIA Rubin H2 2026 launch NVIDIA pull H2 2026 Indirect — peak demand event
Micron HBM Q2/Q3 FY27 ASP report Micron Sep-Dec 2026 earnings Yes if HBM ASP -10% QoQ paired with DRAM spot -15%/90d
HBM4E mass production Hynix / Samsung / Micron 2027 Yes if it arrives early — implies supply over-run
Yongin cluster first fab online SK Hynix 2027 Yes — adds capacity post-Phase-B-window
Micron Hiroshima first shipments Micron 2028 Post-Phase B (down-cycle territory)

What does this mean for current paper positions?

Cross-domain analog (for founder's frame)

This is structurally Snowflake 2022 mid-cycle, not Snowflake 2020 early-cycle. Snowflake's customer-credit-consumption peaked Q4 2022 ~6 months after gross margins hit their max — the analog here is HBM gross margins peaking Q2-Q3 2026, with the cycle top trailing by 1-2 quarters into Q4 2026 / Q1 2027. The phData experience: the contracts-signed signal was the cycle top, not the runway. The same pattern is rhyming in HBM right now (all 2026 capacity pre-sold = peak demand commitment = cycle-top precondition).

Open follow-ups

  1. What is CXMT's actual HBM3 / HBM3E volume trajectory in 2026, and at what point does it become a meaningful secondary supply source (vs. the 2022-2024 "China DRAM threat" narrative that did not materialize at HBM tiers)?
  2. What is the actual HBM-to-DDR5 wafer conversion ratio across the three makers in 2026 (the thesis cites Micron's stated 3:1; is this matched at Hynix and Samsung)? Material for commodity-DRAM spot price modeling.
  3. How does NVIDIA Rubin's per-GPU HBM stack count compare to Blackwell's — and what does the 16-Hi HBM4 push imply for total wafer demand per GPU?
  4. What does the 2018 cycle look like when re-keyed to "Samsung capacity-expansion announcement → ASP rollover lag" — that historical interval is the single best calibration point for the Q3 2026 - Q2 2027 Phase B end window.
  5. Are there observable hyperscaler-side optimization signals (MoE adoption rate, KV-cache compression deployment, ternary-weight model count) that could compress HBM-per-FLOP and accelerate Phase B end?

Sources

Vault

Web (primary and tier-1 trade press)